The present invention relates to partial store of data, and more specifically, to preinstall of partial store cache lines.
Under certain conditions, a partial store of data is obtained. One such condition involves a system such as a mainframe obtaining data from an input/output (I/O device) through an off-the-shelf Peripheral Component Interface express (PCIe) adapter. The PCIe adapter may be optimized for a different architecture than that of the system. For example, the cache line, which is a set of addresses that represent the optimal granularity of data read or written at a time (i.e., the fixed size of data per transfer), may be 256 bytes for the system and 64 bytes for the PCIe adapter. In this case, the system could send or receive only 64 bytes at a time through the PCIe adapter but can transfer 256 bytes at a time internally. This requires the system to perform a partial store of data within the 256 bytes cache line size, 64 bytes or less at a time, and to correctly serialize the sets of 64 bytes that make up its internal 256 byte cache line. Thus, the exemplary mis-match in cache lines illustrates a case in which partial stores of data and proper serialization of the data are necessary to facilitate correct retrieval of the data.